(China (Mainland))
Product Summary
The K7R641882M-FI25 is a kind of 4Mx18-bit QDRTM II b2 SRAM. The device is available in 165FBGA(11x15 ball aray FBGA) with body size of 15x17mm. It has JTAG 1149.1 compatible test access port and programmable output impenance. In addition, it has programmable output impenance. It has separate independent read and write data ports with concurrent read and write operation.
Parametrics
Absolute maximum ratings: (1)Voltage on VDD Supply Relative to VSS, VDD: -0.5 to 2.9 V; (2)Voltage on VDDQ Supply Relative to VSS, VDDQ: -0.5 to VDD V; (3)Voltage on Input Pin Relative to VSS, VIN: -0.5 to VDD+0.3 V; (4)Storage Temperature, TSTG: -65 to 150℃; (5)Operating Temperature, TOPR: 0 to 70℃; (6)Storage Temperature Range Under Bias, TBIAS: -10 to 85℃.
Features
Features: (1)1.8V+0.1V/-0.1V Power Supply.; (2)DLL circuitry for wide output data valid window and future; (3)freguency scaling.; (4)I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O,1.8V+0.1V/-0.1V for 1.8V I/O.; (5)Separate independent read and write data ports with concurrent read and write operation; (6)HSTL I/O; (7)Full data coherency, providing most current data ; (8)Synchronous pipeline read with self timed early write; (9)Registered address, control and data input/output; (10)DDR(Double Data Rate) Interface on read and write ports; (11)Fixed 2-bit burst for both read and write operation; (12)Clock-stop supports to reduce current; (13)Two input clocks(K and K) for accurate DDR timing at clock; (14)rising edges only; (15)Two input clocks for output data(C and C) to minimize clock-skew and flight-time mismatches; (16)Two echo clocks (CQ and CQ) to enhance output data traceability; (17)Single address bus; (18)Byte write function; (19)Sepatate read/write control pin(R and W).
Diagrams
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 K7R640982M |
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Negotiable |
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K7R641882M |
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Negotiable |
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K7R643682M |
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Negotiable |
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